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The Genius of RISC-V Microprocessors
How the instruction set for RISC-V processors has been designed cleverly for both simplicity and high performance.
14 min readDec 15, 2020
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Since the RISC and CISC wars that raged in the late 1990s, people have claimed that RISC and CISC doesn’t matter anymore. Many will claim that instruction-sets are irrelevant.
But instruction-sets matter. They put limits on what kind of optimizations you can easily add to a microprocessor.
I have lately been learning more about the RISC-V instruction-set architecture (ISA) and here are some of the things which really impress me about the RISC-V ISA:
- It is a RISC instruction set which is small and easy to learn (47 in base). Very favorable to anyone interested in learning about microprocessors. RISC-V Cheat Sheet.
- Dominant architecture used for teaching digital design in universities: Why Universities Want RISC-V.
- It is cleverly designed to allow CPU builders to create high performance microprocessors using a RISC-V ISA.
- With no license fees and being designed to allow simple hardware implementations, a dedicated hobbyist could in principle make his own RISC-V CPU design in reasonable time.
- Open Source designs readily…